The Future of Nanocomputers, George Bourianoff, IEEE Computer, 36, 8, Aug 2003, 44-53

International Roadmap for Semiconductors 2001

Daniel Benjamin, Elif Alpaslan

Notes

Nanotubes for Electronics, Scientific American, December 2000, 62-69

Carbon Nanotube Field-Effect Transistors and Logic Circuits, R. Martel, V. Derycke, J. Appenzeller, S. Wind, and Ph. Avouris, Design Automation Conference, Jun 2002, 94-98

Logic Circuits with Carbon Nanotube Transistors, P. Hadley, T. Nakanishi, C. Dekker, Science, 294, Nov 2001, 1317-1320

Optional Reading:
A Novel Multiple-Valued Logic Design Using Ballistic Carbon Nanotube FETs, A. Raychowdhury, K. Roy, International Symposium on Multiple-Valued Logic, 2004

Hoang Do, Napat Triroj

Notes

9/28/05

(Wednesday)

MAKEUPCLASS

Logic Gates and Computation from Assembled Nanowire Building Blocks, Y. Huang, X. Duan, Y. Cui, L. J. Lauhon, K.-H. Kim, C. M. Lieber, Science, 294, Nov. 2001, 1313-1317

Nonvolatile Memory and Programmable Logic from Molecule-Gated Nanowires, Xiangfeng Duan, Yu Huang, and Charles M. Lieber, Nanoletters, Vol. 2, No. 5, 2002, 487-490

A long paper, but worthwhile reading. You should read the whole article eventually, but for now, concentrate on Sections 3,4:
Nanowire-Based Programmable Architectures, A. DeHon, ACM Journal on Emerging Technologies in Computing Systems, Vol. 1, No. 2, July 2005.

Elif Alpaslan, Sirinrath Sirivisoot

Notes

Nanocell Logic Gates for Molecular Computing, J. M. Tour, W. L. Van Zandt, C. P. Husband, S. M. Husband, L. S. Wilson, P. D. Franzon, D. P. Nackashi, IEEE Transactions on Nanotechnology, 1, 2, Jun 2002, 100-109

Logic and Memory with Nanocell Circuits, C. P. Husband, S. M. Husband, J. S. Daniels, J. M. Tour, IEEE Transactions on Electron Devices, 50, 9, Sep 2003, 1865-1875

Desta Tadesse, Luis Camacho

Notes

10/3/05

(Monday)

MAKEUPCLASS

Electronically Configurable Molecular-Based Logic Gates, C. P. Collier, E. W. Wong, M. Belohradsky, F. M. Raymo, J. F. Stoddart, P. J. Kuekes, R. S. Williams, J. R. Heath, Science, 285, Jul 1999, 391-394

A [2]Catenane-Based Solid State Electronically Reconfigurable Switch, C. P. Collier, G. Mattersteig, E. W. Wong, Y. Luo, K. Beverly, J. Sampaio, F. M. Raymo, J. F. Stoddart, J. R. Heath, Science, 289, August 2000, 1172-1175

Large On-Off Ratios and Negative Differential Resistance in a Molecular Electronic Device, J. Chen, M. A. Reed, A. M. Rawlett, J. M. Tour, Science, 286, November 1999, 1550-1552

Dimitrios Kazazis, Greg Harm

Notes

Afterlife for Silicon: CMOL Circuit Architectures, X. Ma, D. B. Strukov, J. H. Lee, and K. K. Likharev, IEEE-NANO, July 2005.

CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices, D. B. Strukov and K. K. Likharev, Nanotechnology, 16, (2005) 888–900

Hoang Do, Daniel Benjamin

Notes

A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology, J. R. Heath, P. J. Kuekes, G. S. Snider, R. S. Williams, Science, 280, June 1998, 1716-1721.

Fault-Tolerant Techniques for Nanocomputers, K. Nikolic, A. Sadek, M. Forshaw, Nanotechnology, 13, 2002, 357-362.

Napat Triroj, Desta Tadesse

Notes

10/12/05

(Wednesday)

MAKEUPCLASS

NanoFabrics: Spatial Computing Using Molecular Electronics, S. C. Goldstein, M. Budiu, International Symposium on Computer Architecture, July 2001, 178-191.

Dimitrios Dazazis, Luis Camacho

Notes

Digital Logic Gate Using Quantum-dot Cellular Automata, I. Amlani, A. O. Orlov, G. Toth, G. H. Bernstein, C. S. Lent, G. L. Snider, Science, Vol. 284, April 9, 1999, pp. 289-291.

Quantum-dot cellular automata: Review and recent experiments, G. L. Snider, A. O. Orlov, I. Amlani, X. Zuo, G. H. Bernstein, C. S. Lent, J. L. Merz, W. Porod, Journal of Applied Physics, Vol. 85, No. 8, 1999, pp. 4283-4285.

Experimental demonstration of a latch in clocked quantum-dot cellular automata, A. O. Orlov, R. K. Kummanmuru, R. Ramasubramaniam, G. Toth, C. S. Lent, G. H. Bernstein, and G. L. Snider, Applied Physics Letters, Vol. 78, No. 11, 2001.

Optional Reading:
A Device Architecture for Computing with Quantum Dots, Proceedings of the IEEE, Vol. 84, No. 4, April 1997, 541-557.

Greg Harm, Sirinrath Sirivisoot

Notes

Exploring and Exploiting Wire-Level Pipelining in Emerging Technologies, M. T. Niemier, P. M. Kogge, International Symposium on Computer Architecture, July 2001, pp. 166-177.

Computer Arithmetic Structures for Quantum Cellular Automata,, K. Walus, G.A. Jullien, V. Dimitrov, IEEE Asilomar Conference on Signals, Systems, and Computers, November 9-12, 2003, Pacific Grove, CA.

Elif Alpaslan, Hoang Do

Notes

DNA in a material world,, N. C. Seeman, Nature, Vol. 421, Jan. 23, 2003, pp 427-431.

DNA Lattices: A Method for Molecular-Scale Patterning and Computation, J. H. Reif, Computing in Science and Engineering, Jan./Feb. 2002, pp. 32-41.

Napat Triroj, Luis Camacho

Notes

Algorithmic Self-Assembly of DNA: Theoretical Motivations and 2D Assembly Experiments, Erik Winfree, Journal of Biomolecular Structure & Dynamics, Conversation 11, issue #2, 2000.

Design of DNA origami, Paul W. K. Rothemund, IEEE/ACM International Conference on Computer-Aided Design, November 2005.

Danny Benjamin, Dimitrios Kazazis

Notes

Array-Based Architecture for FET-Based Nanoscale Electronics, A. DeHon, IEEE Transactions on Nanotechnology, Vol. 2, No. 1, March 2003.

Wire-Streaming Processors on 2-D Nanowire Fabrics, T. Wang, M. Ben-Naser, Y. Guo, C. A. Moritz, NSTI Nanotech 2005, California, May 2005.

Optional Reading:
Opportunities and Challenges in Application-Tuned Circuits and Architectures Based on Nanodevices, T. Wang, Z. Qi, C. A. Moritz, First Conference on Computing Frontiers, Italy, Apr 2004, pp. 503-511.

Greg Harm, Elif Alpaslan

Notes

Fault-tolerance in nanocomputers: a cellular array approach, F. Peper, L. Jia,F. Abo, T. Isokawa, S. Adachi, N. Matsui, S. Mashiko, IEEE Transactions on Nanotechnology, Vol. 3, Issue 1, March 2004, pp.187-201.

Sirinrath Siriviroot, Desta Tadesse

Notes

Special presentation on literature searching

---

---

The Design of DNA Self-Assembled Computing Circuitry, C. Dwyer, L. Vicci, J. Poulton, D. Erie, R. Superfine, S. Washburn, R. M. Taylor, IEEE Transactions on VLSI Systems, Vol. 12, No. 11, Nov. 2004, pp. 1214-1220

DNA Self Assembled Parallel Computer Architectures, C. Dwyer, J. Poulton, R. Taylor, L. Vicci, Nanotechnology 15 (2004) 1688–1694

Hoang Do, Napat Triroj

Notes

The Cell Matrix: An Architecture for Nanocomputing, L. J. K. Durbeck, N. J. Macias, Nanotechnoogy 12 (2001), pp. 217-230.

Self-Assembling Circuits with Autonomous Fault Handling, N. J. Macias, L. J. K. Durbeck, The 2002 NASA/DOD Conference on Evolvable Hardware, A. Stoica, J. Lohn, R. Katz, D. Keymeulen R. S. Zebulum editors, pp. 46-55.

Luis Camacho, Greg Harm

Notes

Toward Quantum Computation: A Five-Qubit Quantum Processor, M. Steffen, L. M. K. Vandersypen, I. L. Chuang, IEEE Micro, March-April 2001, pp. 24-34.

Bulk Spin-Resonance Quantum Computation, N. A. Gershenfeld, I. L. Chuang, Science, Vol 275, January 17, 1997, pp. 350-356

Quantum Mechanics Helps in Searching for a Needle in a Haystack, L. K. Gover, Physical Review Letters, Vol. 79, No. 2, 14 July 1997, pp. 325-328.

Sirinrath Sirivisoot, Daniel Benjamin

Notes

PipeRench: A Reconfigurable Architecture and Compiler., S. C. Goldstein, H. Schmit, M. Budiu, S. Cadambi, M. Moe, and R. R. Taylor, IEEE Computer, April 2000, pp. 70-77.

PipeRench: A Coprocessor for Steaming Multimedia Acceleration, S. C. Goldstein, H. Schmit, M. Moe, M. Budiu, S. Cadambi, R. R. Taylor, and R. Laufer, International Symposium on Computer Architecture, May 1999.

Desta Tadesse, Dimitrios Kazazis

Notes

A Reconfiguration-Based Defect-Tolerant Design Paradigm for Nanotechnologies., C. He, G. de Veciana, and M. Jacome, IEEE Design and Test of Computers, July/August 2005.

none