core/vil1/vil1_16bit.cxx

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00001 // This is core/vil1/vil1_16bit.cxx
00002 #ifdef VCL_NEEDS_PRAGMA_INTERFACE
00003 #pragma implementation
00004 #endif
00005 //:
00006 // \file
00007 // \author fsm
00008 
00009 #include "vil1_16bit.h"
00010 #include <vil1/vil1_stream.h>
00011 #include <vxl_config.h>
00012 
00013 typedef vxl_uint_8  word8;
00014 typedef vxl_uint_16 word16;
00015 
00016 unsigned vil1_16bit_read_big_endian(vil1_stream *s)
00017 {
00018   word8 bytes[2];
00019   s->read(bytes, sizeof bytes);
00020   return word16(bytes[1]) + (word16(bytes[0])<<8);
00021 }
00022 
00023 unsigned vil1_16bit_read_little_endian(vil1_stream *s)
00024 {
00025   word8 bytes[2];
00026   s->read(bytes, sizeof bytes);
00027   return word16(bytes[0]) + (word16(bytes[1])<<8);
00028 }
00029 
00030 void vil1_16bit_write_big_endian(vil1_stream *s, unsigned w)
00031 {
00032   word8 bytes[2];
00033   bytes[0] = word8(w >> 8);
00034   bytes[1] = word8(w & 0xff);
00035   s->write(bytes, sizeof bytes);
00036 }
00037 
00038 void vil1_16bit_write_little_endian(vil1_stream *s, unsigned w)
00039 {
00040   word8 bytes[2];
00041   bytes[0] = word8(w & 0xff);
00042   bytes[1] = word8(w >> 8);
00043   s->write(bytes, sizeof bytes);
00044 }

Generated on Mon Mar 8 05:09:32 2010 for core/vil1 by  doxygen 1.5.1