1/24/2007: Lecture 1: Introduction
1/26/2007: NO LECTURE
1/29/2007: Lecture 2: Design Metrics
1/31/2007: Lecture 3: Amdahl's Law
2/2/2007: Lecture 4: More Trends in Computer System Design and introduction to Instruction Set Design
2/5/2007: Lecture 5: Instruction Set Design
2/7/2007: Lecture 6: Control Instructions
2/9/2007: Lecture 7: Introduction to Pipelining
2/12/2007: Lecture 8: Hazards in Pipelining
2/14/2007: Lecture 9: Pipeline Register Design and Handling Data Hazards
2/16/2007: Lecture 10: Handling Control Hazards
2/21/2007: Lecture 11: Exceptions and Multicycle Operations
2/23/2007: Lecture 12: Computer Arithmetic
2/26/2007: Lecture 13: Faster Addition and Integer Multiplication
2/28/2007: Lecture 14: Implementing Carry Lookahead Adders, Booth Multiplication, Integer Division
3/2/2007: Lecture 15: Floating Point Arithmetic
3/5/2007: Lecture 16: Cache Basics
3/7/2007: Lecture 17: Cache Design
3/9/2007: Lecture 18: Improving Cache Miss Rate
3/12/2007: Lecture 19: DRAM and Main Memory
3/14/2007: Lecture 20: Virtual Memory
3/16/2007: Lecture 21: Translation Lookaside Buffers and Virtual to Physical Address Translation
3/19/2007: Lecture 22: Advanced Pipelining Techniques
3/21/2007: Lecture 23: Register Renaming and Reservation Stations
3/23/2007: Lecture 24: Tomasulo's Algorithm
4/2/2007: NO LECTURE
4/4/2007: Lecture 25: Modernized Tomasulo and Metaflow
4/6/2007: Lecture 26: Dynamic Branch Prediction
4/9/2007: Lecture 27: More Branch Prediction
4/11/2007: Lecture 28: Branch Prediction Recovery
4/13/2007: Lecture 29: Limits of Instruction Level Parallelism
4/16/2007: Lecture 30: Multiprocessors
4/18/2007: Lecture 31: Shared Memory Coherence Protocols
4/20/2007: Lecture 32: Distributed Shared Memory
4/23/2007: Lecture 33: Multiprocessor Synchronization
4/25/2007: Lecture 34: Simultaneous Multithreading
4/27/2007: Lecture 35: VLIW Architectures
4/30/2007: Lecture 36: The EPIC Architectures and Itanium Processor
5/2/2007: Lecture 37: Software Scheduling
5/4/2007: Lecture 38: Trace Scheduling